| Hardware architecture and software stack for PIM based on commercial DRAM technology: Industrial product S Lee, S Kang, J Lee, H Kim, E Lee, S Seo, H Yoon, S Lee, K Lim, H Shin, ... 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021 | 228 | 2021 |
| 25.4 a 20nm 6gb function-in-memory dram, based on hbm2 with a 1.2 tflops programmable computing unit using bank-level parallelism, for machine learning applications YC Kwon, SH Lee, J Lee, SH Kwon, JM Ryu, JP Son, O Seongil, HS Yu, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 350-352, 2021 | 184 | 2021 |
| A 1.2 V 20 nm 307 GB/s HBM DRAM with at-speed wafer-level IO test scheme and adaptive refresh considering temperature distribution K Sohn, WJ Yun, R Oh, CS Oh, SY Seo, MS Park, DH Shin, WC Jung, ... IEEE Journal of Solid-State Circuits 52 (1), 250-260, 2016 | 108 | 2016 |
| Near-memory processing in action: Accelerating personalized recommendation with axdimm L Ke, X Zhang, J So, JG Lee, SH Kang, S Lee, S Han, YG Cho, JH Kim, ... IEEE Micro 42 (1), 116-127, 2021 | 103 | 2021 |
| A 0.7-fJ/bit/search 2.2-ns search time hybrid-type TCAM architecture S Choi, K Sohn, HJ Yoo IEEE Journal of solid-state circuits 40 (1), 254-260, 2005 | 95 | 2005 |
| A 1.2 V 30 nm 3.2 Gb/s/pin 4 Gb DDR4 SDRAM with dual-error detection and PVT-tolerant data-fetch scheme K Sohn, T Na, I Song, Y Shim, W Bae, S Kang, D Lee, H Jung, S Hyun, ... IEEE journal of solid-state circuits 48 (1), 168-177, 2012 | 83 | 2012 |
| 22.1 A 1.1 V 16GB 640GB/s HBM2E DRAM with a data-bus window-extension technique and a synergetic on-die ECC scheme CS Oh, KC Chun, YY Byun, YK Kim, SY Kim, Y Ryu, J Park, S Kim, S Cha, ... 2020 IEEE International Solid-State Circuits Conference-(ISSCC), 330-332, 2020 | 64 | 2020 |
| Aquabolt-XL: Samsung HBM2-PIM with in-memory processing for ML accelerators and beyond JH Kim, S Kang, S Lee, H Kim, W Song, Y Ro, S Lee, D Wang, H Shin, ... 2021 IEEE Hot Chips 33 Symposium (HCS), 1-26, 2021 | 48 | 2021 |
| Device and method for repairing memory cell and memory system including the device KM Sohn, H Song, S Hwang, C Kim, S Dong-Hyun US Patent 9,087,613, 2015 | 42 | 2015 |
| A 16-GB 640-GB/s HBM2E DRAM with a data-bus window extension technique and a synergetic on-die ECC scheme KC Chun, YK Kim, Y Ryu, J Park, CS Oh, YY Byun, SY Kim, DH Shin, ... IEEE Journal of Solid-State Circuits 56 (1), 199-211, 2020 | 36 | 2020 |
| Device and method for repairing memory cell and memory system including the device KM Sohn, H Song, S Hwang, C Kim, S Dong-Hyun US Patent 9,831,003, 2017 | 32 | 2017 |
| Semiconductor memory device having inverting circuit and controlling method there of KM Sohn US Patent 9,640,233, 2017 | 31 | 2017 |
| Hardware architecture and software stack for pim based on commercial dram technology: Industrial product. In 2021 ACM/IEEE 48th Annual International Symposium on Computer … S Lee, S Kang, J Lee, H Kim, E Lee, S Seo, H Yoon, S Lee, K Lim, H Shin, ... Symp. on Computer Architecture (ISCA), 43, 2021 | 30 | 2021 |
| Aquabolt-XL HBM2-PIM, LPDDR5-PIM with in-memory processing, and AXDIMM with acceleration buffer JH Kim, SH Kang, S Lee, H Kim, Y Ro, S Lee, D Wang, J Choi, J So, ... IEEE Micro 42 (3), 20-30, 2022 | 29 | 2022 |
| A low-power star-topology body area network controller for periodic data monitoring around and inside the human body S Choi, SJ Song, K Sohn, H Kim, J Kim, J Yoo, HJ Yoo 2006 10th IEEE International Symposium on Wearable Computers, 139-140, 2006 | 28 | 2006 |
| Internal power voltage generating circuit having a single drive transistor for stand-by and active modes KM Sohn US Patent 6,313,694, 2001 | 28 | 2001 |
| Semiconductor memory device KM Sohn, B Moon US Patent 8,495,437, 2013 | 27 | 2013 |
| Device and system including adaptive repair circuit S Shin, LEE Hae-Suk, J Han-Vit, KM Sohn US Patent 9,727,409, 2017 | 25* | 2017 |
| HBM3 RAS: Enhancing resilience at scale S Gurumurthi, K Lee, M Jang, V Sridharan, A Nygren, Y Ryu, K Sohn, ... IEEE Computer Architecture Letters 20 (2), 158-161, 2021 | 22 | 2021 |
| Method of operating memory device and methods of writing and reading data in memory device JP Son, YS Sohn, K Uk-Song, CW Park, J Choi, WI Bae, KM Sohn US Patent 9,589,674, 2017 | 21 | 2017 |
