Alberto Sangiovanni Vincentelli

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Luciano LavagnoPolitecnico di TorinoVerified email at polito.it
Tiziano VillaProfessore d'informatica, Universita' di VeronaVerified email at univr.it
Sanjit A. SeshiaProfessor of EECS, University of California, BerkeleyVerified email at eecs.berkeley.edu
Luca CarloniProfessor and Chair of Computer Science, Columbia UniversityVerified email at cs.columbia.edu
Roberto PasseroneProfessor of Electrical Engineering and Computer Sciences, University of TrentoVerified email at unitn.it
Pierluigi NuzzoEECS Department, University of California, BerkeleyVerified email at eecs.berkeley.edu
Marco Di NataleFull Professor, TECIP Institute, Scuola Superiore S. AnnaVerified email at sssup.it
Maria Domenica Di BenedettoProfessor, University of L'Aquila, ItalyVerified email at univaq.it
Edward A. LEEProfessor of Electrical Engineering and Computer Sciences, University of California at BerkeleyVerified email at berkeley.edu
Jan RabaeyProfessor of EECS, University of California at BerkeleyVerified email at berkeley.edu
Edoardo CharbonProfessor of Advanced Quantum Architectures, EPFLVerified email at epfl.ch
Luca BenvenutiSapienza Università di RomaVerified email at uniroma1.it
Sunil KhatriTexas A&M UniversityVerified email at tamu.edu
Qi ZhuProfessor of Computer EngineeringVerified email at northwestern.edu
Mehdi MaasoumyPhD, University of California, BerkeleyVerified email at berkeley.edu
Alessandro PintoNASA Jet Propulsion LaboratoryVerified email at jpl.nasa.gov
Haibo ZengElectrical & Computer Engineering, Virginia TechVerified email at vt.edu
Abhijit DavareResearch Scientist, IntelVerified email at intel.com
Carlo FischioneProfessor, KTH, EECS, Network and Systems EngineeringVerified email at kth.se
Timothy Yee-Kwong KamIntelVerified email at intel.com

Alberto Sangiovanni Vincentelli

Professor of EECS, University of California, Berkeley

Verified email at eecs.berkeley.edu - Homepage

System design embedded systems design automation verification synthesis


Title Sort by citations Sort by year Sort by title	Cited by Cited by	Year
Logic minimization algorithms for VLSI synthesis RK Brayton Springer, 1984	2734	1984
SIS: A system for sequential circuit synthesis ME Sentovich Memorandom no. UCB/ERL M92/41, 1992	2496	1992
MIS: A multiple-level logic optimization system RK Brayton, R Rudell, A Sangiovanni-Vincentelli, AR Wang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1987	1657	1987
System-level design: Orthogonalization of concerns and platform-based design K Keutzer, AR Newton, JM Rabaey, A Sangiovanni-Vincentelli IEEE transactions on computer-aided design of integrated circuits and …, 2000	1364	2000
Hardware-software co-design of embedded systems: the POLIS approach F Balarin, P Giusto, A Jurecska, C Passerone, E Sentovich, B Tabbara, ... Springer Science & Business Media, 2012	1146	2012
The waveform relaxation method for time-domain analysis of large scale integrated circuits E Lelarasmee, AE Ruehli, AL Sangiovanni-Vincentelli IEEE transactions on computer-aided design of integrated circuits and …, 1982	1103	1982
Modeling cyber–physical systems P Derler, EA Lee, AS Vincentelli Proceedings of the IEEE 100 (1), 13-28, 2011	1067	2011
VIS: A system for verification and synthesis RK Brayton, GD Hachtel, A Sangiovanni-Vincentelli, F Somenzi, A Aziz, ... Computer Aided Verification: 8th International Conference, CAV'96 New …, 1996	977	1996
A framework for comparing models of computation EA Lee, A Sangiovanni-Vincentelli IEEE Transactions on computer-aided design of integrated circuits and …, 1998	926	1998
Design of embedded systems: Formal models, validation, and synthesis S Edwards, L Lavagno, EA Lee, A Sangiovanni-Vincentelli Proceedings of the IEEE 85 (3), 366-390, 1997	822	1997
The TimberWolf placement and routing package C Sechen, A Sangiovanni-Vincentelli IEEE Journal of Solid-State Circuits 20 (2), 510-522, 1985	768	1985
Logic verification using binary decision diagrams in a logic synthesis environment S Malik, AR Wang, RK Brayton, A Sangiovanni-Vincentelli 1988 IEEE International Conference on Computer-Aided Design, 6, 7, 8, 9-6, 7 …, 1988	753	1988
Sequential circuit design using synthesis and optimization EM Sentovich, KJ Singh, C Moon, H Savoj, RK Brayton, ... Proceedings 1992 IEEE International Conference on Computer Design: VLSI in …, 1992	715	1992
Steady-state methods for simulating analog and microwave circuits KS Kundert, JK White, AL Sangiovanni-Vincentelli Springer Science & Business Media, 2013	712	2013
Convergence and finite-time behavior of simulated annealing D Mitra, F Romeo, A Sangiovanni-Vincentelli Advances in applied probability 18 (3), 747-771, 1986	709	1986
Metropolis: An integrated electronic system design environment F Balarin, Y Watanabe, H Hsieh, L Lavagno, C Passerone, ... Computer 36 (4), 45-52, 2003	675	2003
Platform-based design and software design methodology for embedded systems A Sangiovanni-Vincentelli, G Martin IEEE Design & Test of Computers 18 (6), 23-33, 2001	648	2001
Multilevel logic synthesis RK Brayton, GD Hachtel, AL Sangiovanni-Vincentelli Proceedings of the IEEE 78 (2), 264-300, 1990	636	1990
Implicit state enumeration of finite state machines using BDD's J Herve, S Hamid, L Bill, KB Robert, SV Alberto in Computer-Aided Design, 1990. ICCAD-90. Digest of Technical Papers., 1990 …, 1990	601	1990
Multiple-valued minimization for PLA optimization RL Rudell, A Sangiovanni-Vincentelli IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1987	595	1987

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